Duan Research Group

Hetero-integrated Nanostructures and Nanodevices


Logic gates and computation from assembled nanowire building blocks

Y. Huang, X. Duan, Y. Cui, L. L. Lauhon, K. Kim, and C. M. Lieber

Science 294, 1313-1317 (2001)

Miniaturization in electronics through improvements in established “top-down” fabrication techniques is approaching the point where fundamental issues are expected to limit the dramatic increases in computing seen over the past several decades. Here we report a “bottom-up” approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks. We show that crossed nanowire p-n junctions and junction arrays can be assembled in over 95% yield with controllable electrical characteristics, and in addition, that these junctions can be used to create integrated nanoscale field-effect transistor arrays with nanowires as both the conducting channel and gate electrode. Nanowire junction arrays have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computation.
UCLA, Department of Chemistry and Biochemistry
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Los Angeles, CA 90095-1569
E-mail: xduan@chem.ucla.edu