High‐Current‐Density Vertical‐Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures
Yuan Liu, Jiming Sheng, Hao Wu, Qiyuan He, Hung‐Chieh Cheng, Muhammad Imran Shakir, Yu Huang, Xiangfeng Duan
Adv. Mater. 28, 4120-4125 (2016)
Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm−2. This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene–silicon heterostructures.